Low Power Methodology Manual
Tools alone aren't enough to reduce dynamic and leakage power in complex chip designs - a well-planned methodology is needed. Following in the footsteps of the successful Reuse Methodology Manual (RMM), authors from ARM and Synopsys have written this Low Power Methodology Manual (LPMM) to describe [such] [a] low-power methodology with a practical, step-by-step approach. Richard Goering, Software Editor, EE TimesExcellent compendium of low-power techniques and guidelines with balanced content spanning theory and practical implementation. The LPMM is a very welcome addition to the field of low…
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Produktdetails
Weitere Autoren: Flynn, David / Shi, Kaijian / Keating, Michael / Aitken, Robert
- ISBN: 978-0-387-71819-4
- EAN: 9780387718194
- Produktnummer: 12837212
- Verlag: Springer-Verlag GmbH
- Sprache: Englisch
- Erscheinungsjahr: 2007
- Plattform: PDF
- Masse: 5'254 KB
- Auflage: 2007
Über den Autor
ABOUT THE AUTHORS:Michael Keating is a Synopsys Fellow in the company's Advanced Technology Group, focusing on IP development methodology, hardware and software design quality and low power design.David Flynn is an ARM R&D Fellow and has been with the company since 1991, specializing in low power System-on-Chip IP deployment and methodology.Robert Aitken is an ARM R&D Fellow. His areas of responsibility include memory architecture, design for testability and design for manufacturability.Alan Gibbons is a Principal Engineer at Synopsys, with a focus on development of advanced methodology and technology for ARM processor-based system design.Kaijian Shi is a Principal Consultant in the Professional Services Group of Synopsys, specializing in low power design methodology and implementation.
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