Protecting Chips Against Hold Time Violations Due to Variability
This book presents physical understanding, modeling and simulation, on-chip characterization, layout solutions, and design techniques that are effective to enhance the reliability of various circuit units. The consequences of variability to several aspects of circuit design, such as logic gates, storage elements, clock distribution, and any other that can be affected by process variations are discussed, with a key focus on storage elements. The authors present a statistical analysis of the critical clock skew in several test paths, due to process variability in 130nm and 90nm CMOS technology. To facilitate an on-wafer test, a measurement ci…
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Produktdetails
Weitere Autoren: Wirth, Gilson / Reis, Ricardo
- ISBN: 978-94-007-2427-3
- EAN: 9789400724273
- Produktnummer: 18259329
- Verlag: Springer-Verlag GmbH
- Sprache: Englisch
- Erscheinungsjahr: 2013
- Seitenangabe: 107 S.
- Plattform: PDF
- Masse: 5'122 KB
- Auflage: 2014
- Abbildungen: 25 schwarz-weiße und 51 farbige Abbildungen, 23 schwarz-weiße Tabellen, Bibliographie
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