Formal Verification of Circuits
Formal verification has become one of the most important steps in circuit design. Since circuits can contain several million transistors, verification of such large designs becomes more and more difficult. Pure simulation cannot guarantee the correct behavior and exhaustive simulation is often impossible. However, many designs, like ALUs, have very regular structures that can be easily described at a higher level of abstraction. For example, describing (and verifying) an integer multiplier at the bit-level is very difficult, while the verification becomes easy when the outputs are grouped to build a bit-string. Recently, several appr…
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Produktdetails
- ISBN: 978-1-4419-4985-1
- EAN: 9781441949851
- Produktnummer: 10301845
- Verlag: Springer Us
- Sprache: Englisch
- Erscheinungsjahr: 2010
- Seitenangabe: 192 S.
- Masse: H23.5 cm x B15.5 cm x D1.0 cm 300 g
- Auflage: Softcover reprint of hardcover 1st ed. 2000
- Abbildungen: Paperback
- Gewicht: 300
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