Ashok Kumar
LTE system performance simulations
System level simulations of LTE network for throughput analysis
Buch
Demand for multimedia services in mobile communication is dramatically increasing day by day. Previously available technologies such as GSM, UMTS, HSPA, and HSPA+ were enough capable of fulfilling the needs of voice and multimedia services for at least a decade. To fulfill the future needs of data communication on mobile devices, 3rd Generation Partnership Project (3GPP) has introduced a new technology which is known as Long Term Evolution of UMTS (LTE). LTE promises to provide higher data rates on mobile devices than all other mobile technologies i.e. 100 Mbps in downlink and 50 Mbps in uplink, the data rate can be further increased to 326.4…
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Beschreibung
Demand for multimedia services in mobile communication is dramatically increasing day by day. Previously available technologies such as GSM, UMTS, HSPA, and HSPA+ were enough capable of fulfilling the needs of voice and multimedia services for at least a decade. To fulfill the future needs of data communication on mobile devices, 3rd Generation Partnership Project (3GPP) has introduced a new technology which is known as Long Term Evolution of UMTS (LTE). LTE promises to provide higher data rates on mobile devices than all other mobile technologies i.e. 100 Mbps in downlink and 50 Mbps in uplink, the data rate can be further increased to 326.4 Mbps in downlink and 86.4 Mbps in uplink by using higher bandwidth, higher order modulation and MIMO. In this book, performance of LTE networks is analysed for different bandwidth, scheduling, network layouts and environments.
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Produktdetails
- ISBN: 978-3-659-62720-0
- EAN: 9783659627200
- Produktnummer: 37426996
- Verlag: LAP Lambert Academic Publishing
- Sprache: Englisch
- Erscheinungsjahr: 2014
- Seitenangabe: 84 S.
- Masse: H22.0 cm x B15.0 cm x D0.5 cm 143 g
- Abbildungen: Paperback
- Gewicht: 143
Über den Autor
Ashok Kumar, MSc Electrical Engineering with specialisation in radio network planning and RF circuit designing from Tampere University of Technology, Tampere Finland.
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